Voltage-to-current converter circuits are commonly used in the design of analog and digital electronic circuits. Many embodiments of voltage-to-current converter circuits exist, and some have previously been patented. In general, a voltage-to-current converter takes a voltage as its input, and the circuit converts this to an output current.
One embodiment of a conventional voltage-to-current converter is shown in FIG. 1. This conventional circuit comprises three transistors and a resistor. The input voltage is coupled to the gate of a first transistor (M1). The drain of the first transistor is coupled to a resistor to ground. The source of the first transistor is coupled to the gates of a second (M2) and third (M3) transistor. The drain of the second transistor is coupled to the source of the first transistor. The sources of the second and third transistors are coupled to power. The drain of the third transistor is coupled to the output of this circuit.
The conventional circuit generates an output current by biasing the voltage across resistor R to approximately one NMOSFET (M1) threshold voltage less than the input voltage. By using the M1 NMOS input, the input impedance (the impedance of the gate) is large, and while M1 remains in the saturated state, the resistor voltage can remain independent of the state of the M2 PMOS, which generates a VGS (gate to source voltage) to mirror the resistor current to M3 and produce the output current at IOUT. The current generated by the converter circuit 100 is shown in Eq. 1 and the input voltage range of the conventional voltage-to-current converter is shown in Eq. 2 and Eq. 3.
                              I          OUT                =                                                            V                IN                            -                              V                THN                            -                                                                    2                    *                                          I                      OUT                                                                            B                    1                                                                        R                    ≈                                                    V                IN                            -                              V                THN                                      R                                              Eq        .                                  ⁢        1                                          V                      IN            -            MINIMUM                          =                  V          THN                                    Eq        .                                  ⁢        2                                          V                      IN            -            MAXIMUM                          =                              V            PWR                    +                      V            THN                    -                      V            THP                    -                      V            DSAT                                              Eq        .                                  ⁢        3            
A disadvantage of the conventional technology is the limited input voltage range, which, from Eq. 2 and Eq. 3, is from approximately VTHN (threshold voltage of a N-type MOSFET) to VPWR (power supply voltage). When working with low supply voltage, VTHN (approximately 0.7V) can be a significant portion of VPWR, leaving a very narrow input voltage range for the circuit. If the voltage-to-current converter is utilized as a linear tuning element, the narrowed input range forces a greater required change in output current for a given input voltage change, or slope, in order to cover the same output current range. Increasing the IOUT (output current)/VIN (input voltage) slope can have a negative impact on noise and noise sensitivity in the circuit and the systems of which it is part. For example, this voltage-to-current converter can be used as the front end of a voltage controlled oscillator in a PLL (phase lock loop). With a narrow input voltage range, the frequency versus voltage slope (or KVCO, the gain of the voltage controlled oscillator) of the oscillator must be large compared to the KVCO using a wider input voltage range, in order to reach the required range of output frequencies. This, however, causes greater sensitivity to noise on the PLL loop filter resulting in higher PLL output jitter.